[PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)

[Aditya Kumar via Phabricator via llvm-commits]

hiraditya added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:79
+  /// \name Vector Predication Information
+  /// @{
+  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
----------------
nit: What is this intended for?


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Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:82
+  /// in hardware, for the given opcode and type/alignment. (see LLVM Language
+  /// Reference - "Vector Predication Intrinsics").
+  /// Use of %evl is discouraged when that is not the case.
----------------
Does this correspond to: https://llvm.org/docs/Proposals/VectorPredication.html#ir-level-vp-intrinsics ?


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Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:260
+// support vector length predication.
+// Currently this switch takes four possible values:
+// 0. no-predication: Do not generate VP intrinsics.
----------------
What is the fourth value?


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Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:1646
+  /// Returns true if VP intrinsics should be generated in the tail folded loop.
+  bool preferVPIntrinsics() const {
+    return foldTailByMasking() && PreferVPIntrinsics;
----------------
nit: IMO the function name doesn't imply the semantics precisely.

nit: reorder to aviod call if possible
```cpp
PreferVPIntrinsics && foldTailByMasking();
```


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  https://reviews.llvm.org/D99750/new/

https://reviews.llvm.org/D99750