[llvm] 5fc6425 - [ConstantFolding] Fix crash when folding vector llvm.is.fpclass

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2023-04-20T15:34:50+01:00
New Revision: 5fc6425fb6c77052a26cf0cf7b886449fabe1af4

URL: https://github.com/llvm/llvm-project/commit/5fc6425fb6c77052a26cf0cf7b886449fabe1af4
DIFF: https://github.com/llvm/llvm-project/commit/5fc6425fb6c77052a26cf0cf7b886449fabe1af4.diff

LOG: [ConstantFolding] Fix crash when folding vector llvm.is.fpclass

Differential Revision: https://reviews.llvm.org/D148803

Added: 
    llvm/test/Transforms/InstSimplify/is_fpclass.ll

Modified: 
    llvm/lib/Analysis/VectorUtils.cpp

Removed: 
    


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diff  --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp
index 7700c722765d3..d6a760b8571ef 100644
--- a/llvm/lib/Analysis/VectorUtils.cpp
+++ b/llvm/lib/Analysis/VectorUtils.cpp
@@ -86,6 +86,7 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
   case Intrinsic::pow:
   case Intrinsic::fma:
   case Intrinsic::fmuladd:
+  case Intrinsic::is_fpclass:
   case Intrinsic::powi:
   case Intrinsic::canonicalize:
   case Intrinsic::fptosi_sat:
@@ -103,6 +104,7 @@ bool llvm::isVectorIntrinsicWithScalarOpAtArg(Intrinsic::ID ID,
   case Intrinsic::abs:
   case Intrinsic::ctlz:
   case Intrinsic::cttz:
+  case Intrinsic::is_fpclass:
   case Intrinsic::powi:
     return (ScalarOpdIdx == 1);
   case Intrinsic::smul_fix:

diff  --git a/llvm/test/Transforms/InstSimplify/is_fpclass.ll b/llvm/test/Transforms/InstSimplify/is_fpclass.ll
new file mode 100644
index 0000000000000..b14bfcbbfaac3
--- /dev/null
+++ b/llvm/test/Transforms/InstSimplify/is_fpclass.ll
@@ -0,0 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
+; RUN: opt < %s -S -passes=instsimplify | FileCheck %s
+
+define <2 x i1> @f() {
+; CHECK-LABEL: define <2 x i1> @f() {
+; CHECK-NEXT:    ret <2 x i1> zeroinitializer
+;
+  %i = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> <half 0xH7C00, half 0xH7C00>, i32 3)
+  ret <2 x i1> %i
+}
+
+declare <2 x i1> @llvm.is.fpclass.v2f16(<2 x half>, i32 immarg)