[PATCH] D148118: [AArch64][DAGCombiner]: combine <2xi64> mul add/sub.

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:17874
+  SDValue res;
+  if (res = performOpt(N->getOperand(0), N->getOperand(1)))
+    return res;
----------------
Sorry to be a pain @hassnaa-arm, but this generates warnings about missing brackets () around the `res = performOpt...` code. I think you can silence the warnings by rewriting this as:

  if (SDValue res = performOpt(N->getOperand(0), N->getOperand(1)))
    return res;
  else if (N->getOpcode() == ISD::ADD)
    return performOpt(N->getOperand(1), N->getOperand(0));

  return SDValue();


Repository:
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  https://reviews.llvm.org/D148118/new/

https://reviews.llvm.org/D148118