[PATCH] D148710: [DAGCombiner] Limit 'hoist add/sub binop w/ constant op' to the same divergency property

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll:57-58
 ; VARIANT2-NEXT:    global_store_dword v2, v0, s[2:3]
-; VARIANT2-NEXT:    v_xad_u32 v0, v0, -1, s4
+; VARIANT2-NEXT:    s_add_i32 s4, s4, -1
+; VARIANT2-NEXT:    v_sub_u32_e32 v0, s4, v0
 ; VARIANT2-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
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foad wrote:
> Regression
I think the scalar instruction + vop2 instruction should save power compare to v_xad_u32. Especially the xor value is -1. 
But if you insist I can try to "fix" it.


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https://reviews.llvm.org/D148710