[llvm] 43b3869 - Fix uninitialized class members
Akshay Khadse via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 19 20:18:54 PDT 2023
Author: Akshay Khadse
Date: 2023-04-20T11:18:34+08:00
New Revision: 43b38696aa038a83b12850aab25377650e301cde
URL: https://github.com/llvm/llvm-project/commit/43b38696aa038a83b12850aab25377650e301cde
DIFF: https://github.com/llvm/llvm-project/commit/43b38696aa038a83b12850aab25377650e301cde.diff
LOG: Fix uninitialized class members
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D148692
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
llvm/lib/CodeGen/BranchFolding.h
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/IfConversion.cpp
llvm/lib/CodeGen/MachineBlockPlacement.cpp
llvm/lib/CodeGen/MachineCombiner.cpp
llvm/lib/CodeGen/MachineCopyPropagation.cpp
llvm/lib/CodeGen/MachineLICM.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/CodeGen/RegAllocGreedy.h
llvm/lib/CodeGen/ShrinkWrap.cpp
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index eb66896ed2be1..5562e76b67f69 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -145,7 +145,7 @@ class LoadStoreOpt : public MachineFunctionPass {
/// that bit's value is legal. E.g. if bit 64 is set, then 64 bit scalar
/// stores are legal.
DenseMap<unsigned, BitVector> LegalStoreSizes;
- bool IsPreLegalizer;
+ bool IsPreLegalizer = false;
/// Contains instructions to be erased at the end of a block scan.
SmallSet<MachineInstr *, 16> InstsToErase;
diff --git a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
index 60c6994c2a551..ec652f448f0f6 100644
--- a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
+++ b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
@@ -71,7 +71,7 @@ class ReachingDefAnalysis : public MachineFunctionPass {
MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
LoopTraversal::TraversalOrder TraversedMBBOrder;
- unsigned NumRegUnits;
+ unsigned NumRegUnits = 0;
/// Instruction that defined each register, relative to the beginning of the
/// current basic block. When a LiveRegsDefInfo is used to represent a
/// live-out register, this value is relative to the end of the basic block,
@@ -87,7 +87,7 @@ class ReachingDefAnalysis : public MachineFunctionPass {
/// Current instruction number.
/// The first instruction in each basic block is 0.
- int CurInstr;
+ int CurInstr = -1;
/// Maps instructions to their instruction Ids, relative to the beginning of
/// their basic blocks.
diff --git a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
index 0c97e45709d1b..5ea68e0a64af9 100644
--- a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
+++ b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
@@ -152,7 +152,7 @@ namespace llvm {
MachineBasicBlock::iterator RegionEnd;
/// Instructions in this region (distance(RegionBegin, RegionEnd)).
- unsigned NumRegionInstrs;
+ unsigned NumRegionInstrs = 0;
/// After calling BuildSchedGraph, each machine instruction in the current
/// scheduling region is mapped to an SUnit.
diff --git a/llvm/lib/CodeGen/BranchFolding.h b/llvm/lib/CodeGen/BranchFolding.h
index b7d0a5fcf9e74..63b2ef04b21ba 100644
--- a/llvm/lib/CodeGen/BranchFolding.h
+++ b/llvm/lib/CodeGen/BranchFolding.h
@@ -113,10 +113,10 @@ class TargetRegisterInfo;
};
std::vector<SameTailElt> SameTails;
- bool AfterBlockPlacement;
- bool EnableTailMerge;
- bool EnableHoistCommonCode;
- bool UpdateLiveIns;
+ bool AfterBlockPlacement = false;
+ bool EnableTailMerge = false;
+ bool EnableHoistCommonCode = false;
+ bool UpdateLiveIns = false;
unsigned MinCommonTailLength;
const TargetInstrInfo *TII = nullptr;
const MachineRegisterInfo *MRI = nullptr;
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 62253e603cdef..55ba5454f15e7 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -3247,7 +3247,7 @@ class AddressingModeMatcher {
bool IgnoreProfitability;
/// True if we are optimizing for size.
- bool OptSize;
+ bool OptSize = false;
ProfileSummaryInfo *PSI;
BlockFrequencyInfo *BFI;
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 926ede9795d73..b76867b74639a 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -197,8 +197,8 @@ namespace {
LivePhysRegs Redefs;
- bool PreRegAlloc;
- bool MadeChange;
+ bool PreRegAlloc = true;
+ bool MadeChange = false;
int FnNum = -1;
std::function<bool(const MachineFunction &)> PredicateFtor;
diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
index e652105af54ac..eec602279b707 100644
--- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
@@ -411,7 +411,7 @@ class MachineBlockPlacement : public MachineFunctionPass {
/// True: use block profile count to compute tail duplication cost.
/// False: use block frequency to compute tail duplication cost.
- bool UseProfileCount;
+ bool UseProfileCount = false;
/// Allocator and owner of BlockChain structures.
///
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index eb98ccda24875..bb4d1316dd252 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -78,7 +78,7 @@ class MachineCombiner : public MachineFunctionPass {
TargetSchedModel TSchedModel;
/// True if optimizing for code size.
- bool OptSize;
+ bool OptSize = false;
public:
static char ID;
diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index 5fb52e0366cbd..1f1601b12c2c1 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -393,7 +393,7 @@ class MachineCopyPropagation : public MachineFunctionPass {
CopyTracker Tracker;
- bool Changed;
+ bool Changed = false;
};
} // end anonymous namespace
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index 430c5c975d69c..93870e815250a 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -118,8 +118,8 @@ namespace {
const MachineFrameInfo *MFI = nullptr;
MachineRegisterInfo *MRI = nullptr;
TargetSchedModel SchedModel;
- bool PreRegAlloc;
- bool HasProfileData;
+ bool PreRegAlloc = false;
+ bool HasProfileData = false;
// Various analyses that we use...
AliasAnalysis *AA = nullptr; // Alias analysis info.
@@ -128,8 +128,8 @@ namespace {
MachineDominatorTree *DT = nullptr; // Machine dominator tree for the cur loop
// State that is updated as we process loops
- bool Changed; // True if a loop is changed.
- bool FirstInLoop; // True if it's the first LICM in the loop.
+ bool Changed = false; // True if a loop is changed.
+ bool FirstInLoop = false; // True if it's the first LICM in the loop.
MachineLoop *CurLoop = nullptr; // The current loop we are working on.
MachineBasicBlock *CurPreheader = nullptr; // The preheader for CurLoop.
@@ -163,7 +163,7 @@ namespace {
// If a MBB does not dominate loop exiting blocks then it may not safe
// to hoist loads from this block.
// Tri-state: 0 - false, 1 - true, 2 - unknown
- unsigned SpeculationState;
+ unsigned SpeculationState = SpeculateUnknown;
public:
MachineLICMBase(char &PassID, bool PreRegAlloc)
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 8eee6b8f6a47e..fb78c4ce1242e 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -102,12 +102,12 @@ namespace {
const MachineRegisterInfo *MRI = nullptr;
const RegisterBankInfo *RBI = nullptr;
- unsigned foundErrors;
+ unsigned foundErrors = 0;
// Avoid querying the MachineFunctionProperties for each operand.
- bool isFunctionRegBankSelected;
- bool isFunctionSelected;
- bool isFunctionTracksDebugUserValues;
+ bool isFunctionRegBankSelected = false;
+ bool isFunctionSelected = false;
+ bool isFunctionTracksDebugUserValues = false;
using RegVector = SmallVector<Register, 16>;
using RegMaskVector = SmallVector<const uint32_t *, 4>;
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 98d839b7ad5e3..b696b7de7bcfa 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -111,11 +111,11 @@ class PEI : public MachineFunctionPass {
// Flag to control whether to use the register scavenger to resolve
// frame index materialization registers. Set according to
// TRI->requiresFrameIndexScavenging() for the current function.
- bool FrameIndexVirtualScavenging;
+ bool FrameIndexVirtualScavenging = false;
// Flag to control whether the scavenger should be passed even though
// FrameIndexVirtualScavenging is used.
- bool FrameIndexEliminationScavenging;
+ bool FrameIndexEliminationScavenging = false;
// Emit remarks.
MachineOptimizationRemarkEmitter *ORE = nullptr;
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.h b/llvm/lib/CodeGen/RegAllocGreedy.h
index e54e02f5a8904..0f8f9a7d58112 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.h
+++ b/llvm/lib/CodeGen/RegAllocGreedy.h
@@ -204,7 +204,7 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
CO_Interf = 2
};
- uint8_t CutOffInfo;
+ uint8_t CutOffInfo = CutOffStage::CO_None;
#ifndef NDEBUG
static const char *const StageName[];
@@ -278,9 +278,9 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
/// Flags for the live range priority calculation, determined once per
/// machine function.
- bool RegClassPriorityTrumpsGlobalness;
+ bool RegClassPriorityTrumpsGlobalness = false;
- bool ReverseLocalAssignment;
+ bool ReverseLocalAssignment = false;
public:
RAGreedy(const RegClassFilterFunc F = allocateAllRegClasses);
diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp
index ffdea3f79aea3..292a37b8264cb 100644
--- a/llvm/lib/CodeGen/ShrinkWrap.cpp
+++ b/llvm/lib/CodeGen/ShrinkWrap.cpp
@@ -135,13 +135,13 @@ class ShrinkWrap : public MachineFunctionPass {
MachineOptimizationRemarkEmitter *ORE = nullptr;
/// Frequency of the Entry block.
- uint64_t EntryFreq;
+ uint64_t EntryFreq = 0;
/// Current opcode for frame setup.
- unsigned FrameSetupOpcode;
+ unsigned FrameSetupOpcode = ~0u;
/// Current opcode for frame destroy.
- unsigned FrameDestroyOpcode;
+ unsigned FrameDestroyOpcode = ~0u;
/// Stack pointer register, used by llvm.{savestack,restorestack}
Register SP;
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 92f9505408900..f57ad337dc651 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -95,7 +95,7 @@ class TwoAddressInstructionPass : public MachineFunctionPass {
LiveVariables *LV = nullptr;
LiveIntervals *LIS = nullptr;
AliasAnalysis *AA = nullptr;
- CodeGenOpt::Level OptLevel;
+ CodeGenOpt::Level OptLevel = CodeGenOpt::None;
// The current basic block being processed.
MachineBasicBlock *MBB = nullptr;
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