[PATCH] D148762: [RISCV] Rename some variables to improve code clarity
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 19 17:23:49 PDT 2023
craig.topper added a comment.
Please write a description. It will end up the commit log.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:117
-class VLSSched<int n, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVLDS" #n #"_" # suffix),
+class VLSSched<int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVLDS" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:122
-class VSSSched<int n, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVSTS" #n #"_"#suffix),
- !cast<SchedReadWrite>("ReadVSTS" #n #"V_"#suffix),
+class VSSSched<int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVSTS" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:130
+ string dataLMUL = "WorstCase",
+ string idxLMUL = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVLD" #isOrdered #"X" #dataEEW #"_" #dataLMUL),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:150
// Unit-Stride Segment Loads and Stores
-class VLSEGSched<int nf, int eew, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVLSEG" #nf #"e" #eew #"_"#suffix),
+class VLSEGSched<int nf, int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVLSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:154
]>;
-class VSSEGSched<int nf, int eew, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVSSEG" #nf #"e" #eew #"_"#suffix),
- !cast<SchedReadWrite>("ReadVSTEV_"#suffix),
+class VSSEGSched<int nf, int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVSSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:159
]>;
-class VLSEGFFSched<int nf, int eew, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVLSEGFF" #nf #"e" #eew #"_"#suffix),
+class VLSEGFFSched<int nf, int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVLSEGFF" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:164
// Strided Segment Loads and Stores
-class VLSSEGSched<int nf, int eew, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVLSSEG" #nf #"e" #eew #"_"#suffix),
+class VLSSEGSched<int nf, int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVLSSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:168
]>;
-class VSSSEGSched<int nf, int eew, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVSSSEG" #nf #"e" #eew #"_"#suffix),
- !cast<SchedReadWrite>("ReadVSTS" #eew #"V_"#suffix),
+class VSSSEGSched<int nf, int eew, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVSSSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:174
// Indexed Segment Loads and Stores
-class VLXSEGSched<int nf, int eew, string o, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVL" #o #"XSEG" #nf #"e" #eew #"_"#suffix),
- ReadVLDX, !cast<SchedReadWrite>("ReadVLD" #o #"XV" #"_"#suffix), ReadVMask
+class VLXSEGSched<int nf, int eew, string isOrdered, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVL" #isOrdered #"XSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:178
]>;
-class VSXSEGSched<int nf, int eew, string o, string suffix = "WorstCase"> : Sched<[
- !cast<SchedReadWrite>("WriteVS" #o #"XSEG" #nf #"e" #eew #"_"#suffix),
- !cast<SchedReadWrite>("ReadVST" #o #"X" #eew # "_"#suffix),
- ReadVSTX, !cast<SchedReadWrite>("ReadVST" #o #"XV" # "_"#suffix), ReadVMask
+class VSXSEGSched<int nf, int eew, string isOrdered, string lmul = "WorstCase"> : Sched<[
+ !cast<SchedReadWrite>("WriteVS" #isOrdered #"XSEG" #nf #"e" #eew #"_" #lmul),
----------------
nitinjohnraj wrote:
> Should this string be emul instead of lmul?
>
>
Yes
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:1733
+ foreach dataEEW = EEWList in {
+ foreach dataLMUL = MxSet<dataEEW>.m in {
+ defvar octuple_lmul = dataLMUL.octuple;
----------------
Use EMUL instead LMUL in this class.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:1734
+ foreach dataLMUL = MxSet<dataEEW>.m in {
+ defvar octuple_lmul = dataLMUL.octuple;
// Calculate emul = eew * lmul / sew
----------------
Rename octuple_lmul and octuple_emul to clarify one belongs to data and one belongs to index.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:1808
+ foreach dataEEW = EEWList in {
+ foreach dataLMUL = MxSet<dataEEW>.m in {
+ defvar octuple_lmul = dataLMUL.octuple;
----------------
Use EMUL instead of LMUL. Rename the octuple variables
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:3759
+ foreach dataEEW = EEWList in {
+ foreach dataLMUL = MxSet<dataEEW>.m in {
+ defvar octuple_lmul = dataLMUL.octuple;
----------------
Same here
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:3830
+ foreach dataEEW = EEWList in {
+ foreach dataLMUL = MxSet<dataEEW>.m in {
+ defvar octuple_lmul = dataLMUL.octuple;
----------------
And here
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148762/new/
https://reviews.llvm.org/D148762
More information about the llvm-commits
mailing list