[PATCH] D148229: [DAGCombine][AArch64][CodeGen] Allow tranformable vectors to a legal for MULH lowering and use SVE's MULH for fixed vector types.

[Dinar Temirbulatov via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe6096871fdd4: [DAGCombine][AArch64] Allow transformable to legal vectors to be used for MULH… (authored by dtemirbulatov).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148229/new/

https://reviews.llvm.org/D148229

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D148229.514935.patch
Type: text/x-patch
Size: 39567 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230419/7fe97889/attachment.bin>