[PATCH] D128144: [AArch64] Known bits for AArch64ISD::DUP

[Zain Jaffal via Phabricator via llvm-commits]

zjaffal added a comment.

This patch seems to miss the case where the DUP first operand is not an integer type

The following example crashes

  define void @dot_product(double %a) {
  entry:
    %fadd = call double @llvm.vector.reduce.fadd.v3f64(double %a, <3 x double> <double 1.000000e+00, double 1.000000e+00, double 0.000000e+00>)
    %sqrt = call double @llvm.sqrt.f64(double %fadd)
    %insert = insertelement <3 x double> zeroinitializer, double %sqrt, i64 0
    %shuffle = shufflevector <3 x double> %insert, <3 x double> zeroinitializer, <3 x i32> zeroinitializer
    %mul = fmul <3 x double> %shuffle, <double 1.000000e+00, double 1.000000e+00, double 0.000000e+00>
    %shuffle.1 = extractelement <3 x double> %mul, i64 0
    %shuffle.2 = extractelement <3 x double> %mul, i64 1
    %cmp = fcmp ogt double %shuffle.2, 0.000000e+00
    br i1 %cmp, label %exit, label %bb.1
  
  bb.1:
    %mul.2 = fmul double %shuffle.1, 0.000000e+00
    br label %exit
  
  exit:
    ret void
  }
  
  declare double @llvm.sqrt.f64(double)
  declare double @llvm.vector.reduce.fadd.v3f64(double, <3 x double>)

link: https://godbolt.org/z/dPc68eWfz


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D128144/new/

https://reviews.llvm.org/D128144