[PATCH] D148483: RISC-V Zvk (vector crypto) specification update to 0.5.1 (Zvbb/Zvbc/Zvkt/Zvkng/Zvksg)

Brandon Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 18 18:22:52 PDT 2023


4vtomat added inline comments.


================
Comment at: llvm/lib/Support/RISCVISAInfo.cpp:955
+                                        "zvkt"};
+static const char *ImpliedExtsZvksg[] = {"zvks", "zvkg"};
 static const char *ImpliedExtsXsfvcp[] = {"zve32x"};
----------------
Maybe this should be in alphabetical order?


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:500
     : SubtargetFeature<"experimental-zvkg", "HasStdExtZvkg", "true",
-                       "'Zvkg' (Vector GCM instructions for Cryptography.)">;
+                       "'Zvkg' (Vector GCM instructions for Cryptography)">;
 def HasStdExtZvkg : Predicate<"Subtarget->hasStdExtZvkg()">,
----------------
I guess this removal is NFC and not related to this patch~


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:503
                               AssemblerPredicate<(all_of FeatureStdExtZvkg),
-                              "'Zvkg' (Vector GCM instructions for Cryptography.)">;
+                              "'Zvkg' (Vector GCM instructions for Cryptography)">;
 
----------------
I guess this removal is NFC and not related to this patch~


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:541
     : SubtargetFeature<"experimental-zvksed", "HasStdExtZvksed", "true",
-                       "'Zvksed' (SM4 Block Cipher Instructions.)">;
+                       "'Zvksed' (SM4 Block Cipher Instructions)">;
 def HasStdExtZvksed : Predicate<"Subtarget->hasStdExtZvksed()">,
----------------
I guess this removal is NFC and not related to this patch~


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:553
     : SubtargetFeature<"experimental-zvksh", "HasStdExtZvksh", "true",
-                       "'Zvksh' (SM3 Hash Function Instructions.)">;
+                       "'Zvksh' (SM3 Hash Function Instructions)">;
 def HasStdExtZvksh : Predicate<"Subtarget->hasStdExtZvksh()">,
----------------
I guess this removal is NFC and not related to this patch~


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:556
                                AssemblerPredicate<(all_of FeatureStdExtZvksh),
-                               "'Zvksh' (SM3 Hash Function Instructions.)">;
+                               "'Zvksh' (SM3 Hash Function Instructions)">;
+
----------------
I guess this removal is NFC and not related to this patch~


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td:138-139
+  def VREV8_V  : VALUVs2<0b010010, 0b01001, OPMVV, "vrev8.v">;
+
+  defm VANDN_V : VALU_IV_V_X<"vandn", 0b000001>;
+  defm VROL_V  : VALU_IV_V_X<"vrol", 0b010101>;
----------------
Alphabetical order, thanks!
and remove blank line!


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td:146
+let Predicates = [HasStdExtZvbc] in {
   defm VCLMUL_V : VCLMUL_MV_V_X<"vclmul", 0b001100>;
   defm VCLMULH_V : VCLMUL_MV_V_X<"vclmulh", 0b001101>;
----------------
This also need indentation.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148483/new/

https://reviews.llvm.org/D148483



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