[PATCH] D148672: Fix i1 vector reduction miscompilation

[Markus Everling via Phabricator via llvm-commits]

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Previously, `vecreduce_{and,or} vNi1` could lead to miscompilations because the legalizer first decides to `any_ext` the operand (which is correct for `vecreduce_{and,or}`) and then decides to use `vecreduce_u{min,max}` instead (for which `any_ext` is incorrect). This patch changes it so the `vecreduce_u{min,max}` operations use `sign_ext` instead of `any_ext`.

Issue: https://github.com/llvm/llvm-project/issues/62211


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148672

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
  llvm/test/CodeGen/AArch64/reduce-and.ll
  llvm/test/CodeGen/AArch64/reduce-or.ll
  llvm/test/CodeGen/AArch64/reduce-xor.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-ptest.ll
  llvm/test/CodeGen/AArch64/vecreduce-add-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll

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