[PATCH] D148647: [RISCV] Fix interleave crash on unary interleaves

[Craig Topper via Phabricator via llvm-commits]

craig.topper requested changes to this revision.
craig.topper added a comment.
This revision now requires changes to proceed.

I think this made us no longer support

  define <8 x i8> @foo(<8 x i8> %x, <8 x i8> %y) {                                 
    ; V128-LABEL: unary_interleave_v4i8_invalid:                                   
    ; V128:       # %bb.0:                                                         
    ; V128-NEXT:    lui a0, %hi(.LCPI17_0)                                         
    ; V128-NEXT:    addi a0, a0, %lo(.LCPI17_0)                                    
    ; V128-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma                              
    ; V128-NEXT:    vle8.v v10, (a0)                                               
    ; V128-NEXT:    vrgather.vv v9, v8, v10                                        
    ; V128-NEXT:    vmv1r.v v8, v9                                                 
    ; V128-NEXT:    ret                                                            
    ;                                                                              
    ; V512-LABEL: unary_interleave_v4i8_invalid:                                   
    ; V512:       # %bb.0:                                                         
    ; V512-NEXT:    lui a0, %hi(.LCPI17_0)                                         
    ; V512-NEXT:    addi a0, a0, %lo(.LCPI17_0)                                    
    ; V512-NEXT:    vsetivli zero, 4, e8, mf8, ta, ma                              
    ; V512-NEXT:    vle8.v v10, (a0)                                               
    ; V512-NEXT:    vrgather.vv v9, v8, v10                                        
    ; V512-NEXT:    vmv1r.v v8, v9                                                 
    ; V512-NEXT:    ret                                                            
      %a = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32> <i32 0, i32 12, i32 1, i32 13, i32 2, i32 14, i32 3, i32 15>
        ret <8 x i8> %a                                                            
  } 



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3294
 
+  // If both elements of the even and odd vector are smaller than the size of
+  // the VT, then it's an unary interleave like:  
----------------
I wonder if the fix should be

if (EvenSrc % (NumElts / 2) != 0 || OddSrc % (NumElts /2) != 0)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148647/new/

https://reviews.llvm.org/D148647