[llvm] c30c5f0 - [MC] Simplify uses of subregs/superregs. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 18 06:17:34 PDT 2023
Author: Jay Foad
Date: 2023-04-18T14:14:07+01:00
New Revision: c30c5f0122243326f89c0f0e9e78118ff34ca9ed
URL: https://github.com/llvm/llvm-project/commit/c30c5f0122243326f89c0f0e9e78118ff34ca9ed
DIFF: https://github.com/llvm/llvm-project/commit/c30c5f0122243326f89c0f0e9e78118ff34ca9ed.diff
LOG: [MC] Simplify uses of subregs/superregs. NFC.
Added:
Modified:
llvm/include/llvm/MC/MCRegisterInfo.h
llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/lib/CodeGen/IfConversion.cpp
llvm/lib/CodeGen/LivePhysRegs.cpp
llvm/lib/CodeGen/MachineRegisterInfo.cpp
llvm/lib/CodeGen/RegisterScavenging.cpp
llvm/lib/CodeGen/StackMaps.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCRegisterInfo.h b/llvm/include/llvm/MC/MCRegisterInfo.h
index d4e236e4af23..11265ba9b067 100644
--- a/llvm/include/llvm/MC/MCRegisterInfo.h
+++ b/llvm/include/llvm/MC/MCRegisterInfo.h
@@ -657,10 +657,7 @@ class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator {
// Definition for isSuperRegister. Put it down here since it needs the
// iterator defined above in addition to the MCRegisterInfo class itself.
inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{
- for (MCPhysReg I : superregs(RegA))
- if (I == RegB)
- return true;
- return false;
+ return is_contained(superregs(RegA), RegB);
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index 6f98e3a5e3de..88f42d8dfd5d 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -261,11 +261,8 @@ void CriticalAntiDepBreaker::ScanInstruction(MachineInstr &MI, unsigned Count) {
if (MO.isRegMask()) {
auto ClobbersPhysRegAndSubRegs = [&](unsigned PhysReg) {
- for (MCPhysReg SR : TRI->subregs_inclusive(PhysReg))
- if (!MO.clobbersPhysReg(SR))
- return false;
-
- return true;
+ return all_of(TRI->subregs_inclusive(PhysReg),
+ [&](MCPhysReg SR) { return MO.clobbersPhysReg(SR); });
};
for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) {
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index deae87aea540..926ede9795d7 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -1512,19 +1512,9 @@ static void UpdatePredRedefs(MachineInstr &MI, LivePhysRegs &Redefs) {
MIB.addReg(Reg, RegState::Implicit | RegState::Define);
continue;
}
- if (LiveBeforeMI.count(Reg))
+ if (any_of(TRI->subregs_inclusive(Reg),
+ [&](MCPhysReg S) { return LiveBeforeMI.count(S); }))
MIB.addReg(Reg, RegState::Implicit);
- else {
- bool HasLiveSubReg = false;
- for (MCPhysReg S : TRI->subregs(Reg)) {
- if (!LiveBeforeMI.count(S))
- continue;
- HasLiveSubReg = true;
- break;
- }
- if (HasLiveSubReg)
- MIB.addReg(Reg, RegState::Implicit);
- }
}
}
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index 758dcf8f2e67..96380d408482 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -265,14 +265,9 @@ void llvm::addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs) {
if (MRI.isReserved(Reg))
continue;
// Skip the register if we are about to add one of its super registers.
- bool ContainsSuperReg = false;
- for (MCPhysReg SReg : TRI.superregs(Reg)) {
- if (LiveRegs.contains(SReg) && !MRI.isReserved(SReg)) {
- ContainsSuperReg = true;
- break;
- }
- }
- if (ContainsSuperReg)
+ if (any_of(TRI.superregs(Reg), [&](MCPhysReg SReg) {
+ return LiveRegs.contains(SReg) && !MRI.isReserved(SReg);
+ }))
continue;
MBB.addLiveIn(Reg);
}
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index ab41c8825380..0048918fc53b 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -644,15 +644,8 @@ void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) {
bool MachineRegisterInfo::isReservedRegUnit(unsigned Unit) const {
const TargetRegisterInfo *TRI = getTargetRegisterInfo();
for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
- bool IsRootReserved = true;
- for (MCPhysReg Super : TRI->superregs_inclusive(*Root)) {
- MCRegister Reg = Super;
- if (!isReserved(Reg)) {
- IsRootReserved = false;
- break;
- }
- }
- if (IsRootReserved)
+ if (all_of(TRI->superregs_inclusive(*Root),
+ [&](MCPhysReg Super) { return isReserved(Super); }))
return true;
}
return false;
diff --git a/llvm/lib/CodeGen/RegisterScavenging.cpp b/llvm/lib/CodeGen/RegisterScavenging.cpp
index b2972a092219..a636da732573 100644
--- a/llvm/lib/CodeGen/RegisterScavenging.cpp
+++ b/llvm/lib/CodeGen/RegisterScavenging.cpp
@@ -198,25 +198,13 @@ void RegScavenger::forward() {
// S1 is can be freely clobbered.
// Ideally we would like a way to model this, but leaving the
// insert_subreg around causes both correctness and performance issues.
- bool SubUsed = false;
- for (const MCPhysReg &SubReg : TRI->subregs(Reg))
- if (isRegUsed(SubReg)) {
- SubUsed = true;
- break;
- }
- bool SuperUsed = false;
- for (MCPhysReg SR : TRI->superregs(Reg)) {
- if (isRegUsed(SR)) {
- SuperUsed = true;
- break;
- }
- }
- if (!SubUsed && !SuperUsed) {
+ if (none_of(TRI->subregs(Reg),
+ [&](MCPhysReg SR) { return isRegUsed(SR); }) &&
+ none_of(TRI->superregs(Reg),
+ [&](MCPhysReg SR) { return isRegUsed(SR); })) {
MBB->getParent()->verify(nullptr, "In Register Scavenger");
llvm_unreachable("Using an undefined register!");
}
- (void)SubUsed;
- (void)SuperUsed;
}
} else {
assert(MO.isDef());
diff --git a/llvm/lib/CodeGen/StackMaps.cpp b/llvm/lib/CodeGen/StackMaps.cpp
index 79b2d42073dd..1058f3b03cc0 100644
--- a/llvm/lib/CodeGen/StackMaps.cpp
+++ b/llvm/lib/CodeGen/StackMaps.cpp
@@ -193,11 +193,11 @@ unsigned StackMaps::getNextMetaArgIdx(const MachineInstr *MI, unsigned CurIdx) {
/// Go up the super-register chain until we hit a valid dwarf register number.
static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
- int RegNum = TRI->getDwarfRegNum(Reg, false);
- for (MCPhysReg SR : TRI->superregs(Reg)) {
+ int RegNum;
+ for (MCPhysReg SR : TRI->superregs_inclusive(Reg)) {
+ RegNum = TRI->getDwarfRegNum(SR, false);
if (RegNum >= 0)
break;
- RegNum = TRI->getDwarfRegNum(SR, false);
}
assert(RegNum >= 0 && "Invalid Dwarf register number.");
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