[PATCH] D148311: [AArch64] Combine add(extract v1i64) into v1i64 add

[Biplob Mishra via Phabricator via llvm-commits]

bipmis accepted this revision.
bipmis added a comment.
This revision is now accepted and ready to land.

LGTM. May benefit from an additional back to back add/sub nodes based tests and extracts out of a non <1 x i64> type

define i64 @sub_i64_ext_ext_test1(<1 x i64> %A, <2 x i64> %B) nounwind {
; CHECK-LABEL: sub_i64_ext_ext_test1:
; CHECK:       // %bb.0:
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    mov x8, v1.d[1]
; CHECK-NEXT:    fmov x9, d0
; CHECK-NEXT:    fmov x10, d1
; CHECK-NEXT:    sub x9, x9, x10
; CHECK-NEXT:    sub x0, x9, x8
; CHECK-NEXT:    ret

  %a = extractelement <1 x i64> %A, i32 0
  %b = extractelement <2 x i64> %B, i32 0
  %c = extractelement <2 x i64> %B, i32 1
  %d = sub i64 %a, %b
  %e = sub i64 %d, %c
  ret i64 %e

}


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  https://reviews.llvm.org/D148311/new/

https://reviews.llvm.org/D148311