[PATCH] D147996: [X86] combineConcatVectorOps - remove FADD/FSUB/FMUL handling (2-1)

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:56348
       break;
-    case ISD::FADD:
-    case ISD::FSUB:
----------------
LuoYuanke wrote:
> Add comments to address that the shuffle instructions throughput is less than fadd/fsub/fmul instruction?
No problem


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  https://reviews.llvm.org/D147996/new/

https://reviews.llvm.org/D147996