[PATCH] D148597: [PowerPC] Implement DFP add and sub instructions.

[Stefan Pintilie via Phabricator via llvm-commits]

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Add the following Decimal Floating Point (DFP) instructions for PowerPC.
dadd, daddq, dsub, dsubq

In order to add these instructions a new register class for a pair
of floating point registers is added.

This patch is only to allow the user to specify the instructions in
assembly. There is no scheduling or patterns for the instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148597

Files:
  llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
  llvm/lib/Target/PowerPC/PPCInstrDFP.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.h
  llvm/lib/Target/PowerPC/PPCRegisterInfo.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt
  llvm/test/MC/PowerPC/ppc64-encoding-dfp.s

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