[PATCH] D147996: [X86] combineConcatVectorOps - remove FADD/FSUB/FMUL handling (2-1)

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:56348
       break;
-    case ISD::FADD:
-    case ISD::FSUB:
----------------
Add comments to address that the shuffle instructions throughput is less than fadd/fsub/fmul instruction?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147996/new/

https://reviews.llvm.org/D147996