[PATCH] D148037: [BPF] Make sure ALU32 feature is set in MCSubtargetInfo for mcpu=v3
Eduard Zingerman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 17 10:09:15 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8f906bec79c0: [BPF] Make sure ALU32 feature is set in MCSubtargetInfo for mcpu=v3 (authored by eddyz87).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148037/new/
https://reviews.llvm.org/D148037
Files:
llvm/lib/Target/BPF/BPF.td
llvm/test/CodeGen/BPF/disassemble-mcpu-v3.s
Index: llvm/test/CodeGen/BPF/disassemble-mcpu-v3.s
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/BPF/disassemble-mcpu-v3.s
@@ -0,0 +1,18 @@
+// Make sure that llvm-objdump --mcpu=v3 enables ALU32 feature.
+//
+// Only test a few instructions here, assembler-disassembler.s is more
+// comprehensive but uses --mattr=+alu32 option.
+//
+// RUN: llvm-mc -triple bpfel --mcpu=v3 --assemble --filetype=obj %s -o %t
+// RUN: llvm-objdump -d --mcpu=v2 %t | FileCheck %s --check-prefix=V2
+// RUN: llvm-objdump -d --mcpu=v3 %t | FileCheck %s --check-prefix=V3
+
+w0 = *(u32 *)(r1 + 0)
+lock *(u32 *)(r1 + 0x1) &= w2
+
+
+// V2: 61 10 00 00 00 00 00 00 r0 = *(u32 *)(r1 + 0x0)
+// V2: c3 21 01 00 50 00 00 00 <unknown>
+
+// V3: 61 10 00 00 00 00 00 00 w0 = *(u32 *)(r1 + 0x0)
+// V3: c3 21 01 00 50 00 00 00 lock *(u32 *)(r1 + 0x1) &= w2
Index: llvm/lib/Target/BPF/BPF.td
===================================================================
--- llvm/lib/Target/BPF/BPF.td
+++ llvm/lib/Target/BPF/BPF.td
@@ -17,12 +17,6 @@
class Proc<string Name, list<SubtargetFeature> Features>
: Processor<Name, NoItineraries, Features>;
-def : Proc<"generic", []>;
-def : Proc<"v1", []>;
-def : Proc<"v2", []>;
-def : Proc<"v3", []>;
-def : Proc<"probe", []>;
-
def DummyFeature : SubtargetFeature<"dummy", "isDummyMode",
"true", "unused feature">;
@@ -32,6 +26,12 @@
def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true",
"Disable MCAsmInfo DwarfUsesRelocationsAcrossSections">;
+def : Proc<"generic", []>;
+def : Proc<"v1", []>;
+def : Proc<"v2", []>;
+def : Proc<"v3", [ALU32]>;
+def : Proc<"probe", []>;
+
def BPFInstPrinter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
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