[llvm] b0da998 - [LV] Extend recurrence test coverage for sinking memory instructions.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 17 05:10:20 PDT 2023
Author: Florian Hahn
Date: 2023-04-17T13:08:15+01:00
New Revision: b0da998494abd3da0fb4287e75dde9d5c0799daa
URL: https://github.com/llvm/llvm-project/commit/b0da998494abd3da0fb4287e75dde9d5c0799daa
DIFF: https://github.com/llvm/llvm-project/commit/b0da998494abd3da0fb4287e75dde9d5c0799daa.diff
LOG: [LV] Extend recurrence test coverage for sinking memory instructions.
Extra coverage for D143604, D143605.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll b/llvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll
index 0ba7356beef2..3c4ff0436eb3 100644
--- a/llvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll
+++ b/llvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
-define i32 @can_sink_load_that_uses_for_past_other_loads(ptr noalias %A, ptr noalias %B) {
-; CHECK-LABEL: @can_sink_load_that_uses_for_past_other_loads(
+define i32 @sink_load_that_uses_for_past_other_loads(ptr noalias %A, ptr noalias %B) {
+; CHECK-LABEL: @sink_load_that_uses_for_past_other_loads(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -81,3 +81,180 @@ loop:
exit:
ret void
}
+
+define void @sink_store_that_uses_for_past_instructions(ptr noalias %A, ptr noalias %B) {
+; CHECK-LABEL: @sink_store_that_uses_for_past_instructions(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[FOR]], ptr [[GEP_A]], align 4
+; CHECK-NEXT: [[FOR_NEXT]] = add i32 [[IV]], 2
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %for = phi i32 [ 0, %entry ], [ %for.next, %loop ]
+ %gep.a = getelementptr inbounds i32, ptr %A, i32 %iv
+ store i32 %for, ptr %gep.a
+ %for.next = add i32 %iv, 2
+ %iv.next = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %iv.next, 1000
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @sink_store_past_non_aliasing_load(ptr noalias %A, ptr noalias %B) {
+; CHECK-LABEL: @sink_store_past_non_aliasing_load(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[FOR]], ptr [[GEP_A]], align 4
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]
+; CHECK-NEXT: [[FOR_NEXT]] = load i32, ptr [[GEP_B]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %for = phi i32 [ 0, %entry ], [ %for.next, %loop ]
+ %gep.a = getelementptr inbounds i32, ptr %A, i32 %iv
+ store i32 %for, ptr %gep.a
+ %gep.b = getelementptr inbounds i32, ptr %B, i32 %iv
+ %for.next = load i32, ptr %gep.b
+ %iv.next = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %iv.next, 1000
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @sink_store_past_aliasing_load(ptr %A, ptr %B) {
+; CHECK-LABEL: @sink_store_past_aliasing_load(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[FOR]], ptr [[GEP_A]], align 4
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]
+; CHECK-NEXT: [[FOR_NEXT]] = load i32, ptr [[GEP_B]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %for = phi i32 [ 0, %entry ], [ %for.next, %loop ]
+ %gep.a = getelementptr inbounds i32, ptr %A, i32 %iv
+ store i32 %for, ptr %gep.a
+ %gep.b = getelementptr inbounds i32, ptr %B, i32 %iv
+ %for.next = load i32, ptr %gep.b
+ %iv.next = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %iv.next, 1000
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @sink_store_past_non_aliasing_store(ptr noalias %A, ptr noalias %B) {
+; CHECK-LABEL: @sink_store_past_non_aliasing_store(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[FOR]], ptr [[GEP_A]], align 4
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 123, ptr [[GEP_B]], align 4
+; CHECK-NEXT: [[FOR_NEXT]] = add i32 [[IV]], 2
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %for = phi i32 [ 0, %entry ], [ %for.next, %loop ]
+ %gep.a = getelementptr inbounds i32, ptr %A, i32 %iv
+ store i32 %for, ptr %gep.a
+ %gep.b = getelementptr inbounds i32, ptr %B, i32 %iv
+ store i32 123, ptr %gep.b
+ %for.next = add i32 %iv, 2
+ %iv.next = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %iv.next, 1000
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @sink_store_past_aliasing_store(ptr %A, ptr %B) {
+; CHECK-LABEL: @sink_store_past_aliasing_store(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 [[FOR]], ptr [[GEP_A]], align 4
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[IV]]
+; CHECK-NEXT: store i32 123, ptr [[GEP_B]], align 4
+; CHECK-NEXT: [[FOR_NEXT]] = add i32 [[IV]], 2
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+ %for = phi i32 [ 0, %entry ], [ %for.next, %loop ]
+ %gep.a = getelementptr inbounds i32, ptr %A, i32 %iv
+ store i32 %for, ptr %gep.a
+ %gep.b = getelementptr inbounds i32, ptr %B, i32 %iv
+ store i32 123, ptr %gep.b
+ %for.next = add i32 %iv, 2
+ %iv.next = add nuw nsw i32 %iv, 1
+ %ec = icmp eq i32 %iv.next, 1000
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
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