[PATCH] D148456: [SROA] Remove UB-implying metadata when promoting speculative instruction.

[DianQK via Phabricator via llvm-commits]

DianQK updated this revision to Diff 514005.
DianQK edited the summary of this revision.
DianQK added a comment.

Move the test to `llvm/test/Transforms/SROA/select-load.ll`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148456/new/

https://reviews.llvm.org/D148456

Files:
  llvm/lib/Transforms/Scalar/SROA.cpp
  llvm/test/Transforms/SROA/select-load.ll


Index: llvm/test/Transforms/SROA/select-load.ll
===================================================================
--- llvm/test/Transforms/SROA/select-load.ll
+++ llvm/test/Transforms/SROA/select-load.ll
@@ -409,7 +409,31 @@
   ret i32 %r
 }
 
+; When promoting speculative instruction, metadata that may trigger immediate UB should be dropped.
+define void @load_of_select_with_noundef_nonnull(ptr %buffer, i1 %b) {
+; CHECK-PRESERVE-CFG-LABEL: @load_of_select_with_noundef_nonnull(
+; CHECK-PRESERVE-CFG-NEXT:    [[UB_PTR:%.*]] = alloca ptr, align 8
+; CHECK-PRESERVE-CFG-NEXT:    [[SELECT_PTR:%.*]] = select i1 [[B:%.*]], ptr [[BUFFER:%.*]], ptr [[UB_PTR]]
+; CHECK-PRESERVE-CFG-NEXT:    [[LOAD_PTR:%.*]] = load ptr, ptr [[SELECT_PTR]], align 8, !nonnull !1, !noundef !1
+; CHECK-PRESERVE-CFG-NEXT:    ret void
+;
+; CHECK-MODIFY-CFG-LABEL: @load_of_select_with_noundef_nonnull(
+; CHECK-MODIFY-CFG-NEXT:    br i1 [[B:%.*]], label [[DOTTHEN:%.*]], label [[DOTCONT:%.*]]
+; CHECK-MODIFY-CFG:       .then:
+; CHECK-MODIFY-CFG-NEXT:    [[LOAD_PTR_THEN_VAL:%.*]] = load ptr, ptr [[BUFFER:%.*]], align 8, !nonnull !2, !noundef !2
+; CHECK-MODIFY-CFG-NEXT:    br label [[DOTCONT]]
+; CHECK-MODIFY-CFG:       .cont:
+; CHECK-MODIFY-CFG-NEXT:    [[LOAD_PTR:%.*]] = phi ptr [ [[LOAD_PTR_THEN_VAL]], [[DOTTHEN]] ], [ undef, [[TMP0:%.*]] ]
+; CHECK-MODIFY-CFG-NEXT:    ret void
+;
+  %ub_ptr = alloca ptr
+  %select_ptr = select i1 %b, ptr %buffer, ptr %ub_ptr
+  %load_ptr = load ptr, ptr %select_ptr, !nonnull !1, !noundef !1
+  ret void
+}
+
 !0  = !{!"branch_weights", i32 1,  i32 99}
+!1 = !{}
 
 ; Ensure that the branch metadata is reversed to match the reversals above.
 
Index: llvm/lib/Transforms/Scalar/SROA.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/SROA.cpp
+++ llvm/lib/Transforms/Scalar/SROA.cpp
@@ -1688,15 +1688,17 @@
     bool IsThen = SuccBB == HeadBI->getSuccessor(0);
     int SuccIdx = IsThen ? 0 : 1;
     auto *NewMemOpBB = SuccBB == Tail ? Head : SuccBB;
+    auto &CondMemOp = cast<T>(*I.clone());
     if (NewMemOpBB != Head) {
       NewMemOpBB->setName(Head->getName() + (IsThen ? ".then" : ".else"));
       if (isa<LoadInst>(I))
         ++NumLoadsPredicated;
       else
         ++NumStoresPredicated;
-    } else
+    } else {
+      CondMemOp.dropUBImplyingAttrsAndUnknownMetadata();
       ++NumLoadsSpeculated;
-    auto &CondMemOp = cast<T>(*I.clone());
+    }
     CondMemOp.insertBefore(NewMemOpBB->getTerminator());
     Value *Ptr = SI.getOperand(1 + SuccIdx);
     if (auto *PtrTy = Ptr->getType();


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