[PATCH] D148415: [InstCombine] Improve cost calculation in foldSelectICmpAndBinOp

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n created this revision.
goldstein.w.n added reviewers: majnemer, spatel, nikic, craig.topper.
Herald added subscribers: StephenFan, hiraditya.
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goldstein.w.n requested review of this revision.
Herald added a project: LLVM.
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There is a case where we save an `and` instruction because the `shift`
is the entire bitwidth. So take that into account when accounting the
number of instruction with/without the transform.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148415

Files:
  llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
  llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll


Index: llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
===================================================================
--- llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
+++ llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
@@ -1567,10 +1567,10 @@
 ; Tests factoring in cost of saving the `and`
 define i64 @xor_i8_to_i64_shl_save_and_eq(i8 %x, i64 %y) {
 ; CHECK-LABEL: @xor_i8_to_i64_shl_save_and_eq(
-; CHECK-NEXT:    [[XX:%.*]] = and i8 [[X:%.*]], 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[XX]], 0
-; CHECK-NEXT:    [[Z:%.*]] = xor i64 [[Y:%.*]], -9223372036854775808
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CMP]], i64 [[Z]], i64 [[Y]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[X:%.*]] to i64
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i64 [[TMP1]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP2]], 63
+; CHECK-NEXT:    [[R:%.*]] = xor i64 [[TMP3]], [[Y:%.*]]
 ; CHECK-NEXT:    ret i64 [[R]]
 ;
   %xx = and i8 %x, 1
Index: llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -692,13 +692,25 @@
 
   unsigned C2Log = C2->logBase2();
 
+  bool SavesAnd = false;
+  if (IC->isEquality() && V->hasOneUse()) {
+    // If we are shifting by bitwidth - 1, the `and` can be optimized out.
+    if (C2Log > C1Log) {
+      SavesAnd =
+          (C2Log - C1Log) == (Y->getType()->getScalarSizeInBits() - 1);
+    } else if (C1Log > C2Log) {
+      SavesAnd =
+          (C1Log - C2Log) == (Y->getType()->getScalarSizeInBits() - 1);
+    }
+  }
+
   bool NeedShift = C1Log != C2Log;
   bool NeedZExtTrunc = Y->getType()->getScalarSizeInBits() !=
                        V->getType()->getScalarSizeInBits();
 
   // Make sure we don't create more instructions than we save.
   if ((NeedShift + NeedXor + NeedZExtTrunc) >
-      (IC->hasOneUse() + BinOp->hasOneUse()))
+      (IC->hasOneUse() + BinOp->hasOneUse() + SavesAnd))
     return nullptr;
 
   if (NeedAnd) {


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