[PATCH] D148303: Fix uninitialized pointer members in CodeGen

[Akshay Khadse via Phabricator via llvm-commits]

akshaykhadse added a comment.

The premerge clang-format check complains about the file `llvm/lib/CodeGen/RegAllocBasic.cpp` and hence the build fails.

Upon investigation I found that it expects the following unrelated formatting changes to be present:

  diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
  index bef95e235b16..77d2eaabde72 100644
  --- a/llvm/lib/CodeGen/RegAllocBasic.cpp
  +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
  @@ -41,12 +41,12 @@ static RegisterRegAlloc basicRegAlloc("basic", "basic register allocator",
                                         createBasicRegisterAllocator);
   
   namespace {
  -  struct CompSpillWeight {
  -    bool operator()(const LiveInterval *A, const LiveInterval *B) const {
  -      return A->weight() < B->weight();
  -    }
  -  };
  -}
  +struct CompSpillWeight {
  +  bool operator()(const LiveInterval *A, const LiveInterval *B) const {
  +    return A->weight() < B->weight();
  +  }
  +};
  +} // namespace
   
   namespace {
   /// RABasic provides a minimal implementation of the basic register allocation
  @@ -109,7 +109,7 @@ public:
   
     MachineFunctionProperties getClearedProperties() const override {
       return MachineFunctionProperties().set(
  -      MachineFunctionProperties::Property::IsSSA);
  +        MachineFunctionProperties::Property::IsSSA);
     }
   
     // Helper for spilling all live virtual registers currently unified under preg
  @@ -168,10 +168,8 @@ void RABasic::LRE_WillShrinkVirtReg(Register VirtReg) {
     enqueue(&LI);
   }
   
  -RABasic::RABasic(RegClassFilterFunc F):
  -  MachineFunctionPass(ID),
  -  RegAllocBase(F) {
  -}
  +RABasic::RABasic(RegClassFilterFunc F)
  +    : MachineFunctionPass(ID), RegAllocBase(F) {}
   
   void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
     AU.setPreservesCFG();
  @@ -197,10 +195,7 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
     MachineFunctionPass::getAnalysisUsage(AU);
   }
   
  -void RABasic::releaseMemory() {
  -  SpillerInstance.reset();
  -}
  -
  +void RABasic::releaseMemory() { SpillerInstance.reset(); }
   
   // Spill or split all live virtual registers currently unified under PhysReg
   // that interfere with VirtReg. The newly spilled or split live intervals are
  @@ -311,8 +306,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
                       << "********** Function: " << mf.getName() << '\n');
   
     MF = &mf;
  -  RegAllocBase::init(getAnalysis<VirtRegMap>(),
  -                     getAnalysis<LiveIntervals>(),
  +  RegAllocBase::init(getAnalysis<VirtRegMap>(), getAnalysis<LiveIntervals>(),
                        getAnalysis<LiveRegMatrix>());
     VirtRegAuxInfo VRAI(*MF, *LIS, *VRM, getAnalysis<MachineLoopInfo>(),
                         getAnalysis<MachineBlockFrequencyInfo>());
  @@ -330,10 +324,8 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
     return true;
   }
   
  -FunctionPass* llvm::createBasicRegisterAllocator() {
  -  return new RABasic();
  -}
  +FunctionPass *llvm::createBasicRegisterAllocator() { return new RABasic(); }
   
  -FunctionPass* llvm::createBasicRegisterAllocator(RegClassFilterFunc F) {
  +FunctionPass *llvm::createBasicRegisterAllocator(RegClassFilterFunc F) {
     return new RABasic(F);
   }

**Should I add these even though they are not related?**


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D148303/new/

https://reviews.llvm.org/D148303