[PATCH] D148248: [AArch64][SVE] Generate smull/umull instead of sve v2i64 mul

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

One possible simplification but otherwise looks good.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4580
+      // legal.
+      if (useSVEForFixedLengthVectorVT(VT, true))
+        return LowerToPredicatedOp(Op, DAG, AArch64ISD::MUL_PRED);
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Can this be just `hasSVE()`. `useSVEForFixedLengthVectorVT()` is used to detect when bigger than 128-bit vectors are support and then sometime extended to allow NEON sized vectors.  In this instance you don't care about that and have done all the type checking yourself and so you only need to check for the presence of SVE.


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Comment at: llvm/test/CodeGen/AArch64/sve-mull.ll:4-6
 define <2 x i64> @smull_v2i64(<2 x i32> %op1, <2 x i32> %op2) #0 {
 ; CHECK-LABEL: smull_v2i64:
 ; CHECK:       // %bb.0:
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I guess you've pre-committed these tests but I think it would have been better to add a `-mattr=+sve` RUN line to `aarch64-smull.ll` and thus ensure other related patterns are not degraded when SVE is enabled.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148248/new/

https://reviews.llvm.org/D148248