[PATCH] D129173: [RISCV] Remove debug location to spill/reload instructions
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 13 19:01:04 PDT 2023
benshi001 accepted this revision.
benshi001 added a comment.
This revision is now accepted and ready to land.
I have referred to X86 and AArch64, they both use empty debug location information for spill/load instructions. I think it is OK for RISCV. But it would be better to improve your commit information as follow:
Spill/reload instructions are artificially generated by the compiler and
have no relation to the original source code. So the best thing to do is
not attach any debug location to them (instead of just taking the next
debug location we find on following instructions).
Refered to https://reviews.llvm.org/rG3e081703c349dd00b8ef6991c2d15964915dd8f4
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129173/new/
https://reviews.llvm.org/D129173
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