[compiler-rt] 2c12e9b - [crt] Enable sparc and mips targets
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 12 16:55:20 PDT 2023
Author: Reagan Bohan
Date: 2023-04-12T16:55:15-07:00
New Revision: 2c12e9b7b2dfaafad5ef51ea38a581adfecc90b4
URL: https://github.com/llvm/llvm-project/commit/2c12e9b7b2dfaafad5ef51ea38a581adfecc90b4
DIFF: https://github.com/llvm/llvm-project/commit/2c12e9b7b2dfaafad5ef51ea38a581adfecc90b4.diff
LOG: [crt] Enable sparc and mips targets
This patch enables sparc and mips in compiler-rt CRT, meaning that now every platform supported by compiler-rt builtins (that runs on Linux, i.e. not WebAssembly) will be suported by compiler-rt CRT
Reviewed By: phosek, MaskRay
Differential Revision: https://reviews.llvm.org/D147819
Added:
Modified:
compiler-rt/cmake/crt-config-ix.cmake
compiler-rt/lib/crt/crtbegin.c
Removed:
################################################################################
diff --git a/compiler-rt/cmake/crt-config-ix.cmake b/compiler-rt/cmake/crt-config-ix.cmake
index 066a0edbc567f..dc3265e60984c 100644
--- a/compiler-rt/cmake/crt-config-ix.cmake
+++ b/compiler-rt/cmake/crt-config-ix.cmake
@@ -24,6 +24,8 @@ set(HEXAGON hexagon)
set(X86 i386)
set(X86_64 x86_64)
set(LOONGARCH64 loongarch64)
+set(MIPS32 mips mipsel)
+set(MIPS64 mips64 mips64el)
set(PPC32 powerpc powerpcspe)
set(PPC64 powerpc64 powerpc64le)
set(RISCV32 riscv32)
@@ -31,7 +33,8 @@ set(RISCV64 riscv64)
set(VE ve)
set(ALL_CRT_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${PPC32}
- ${PPC64} ${RISCV32} ${RISCV64} ${VE} ${HEXAGON} ${LOONGARCH64})
+ ${PPC64} ${RISCV32} ${RISCV64} ${VE} ${HEXAGON} ${LOONGARCH64}
+ ${MIPS32} ${MIPS64} ${SPARC} ${SPARCV9})
include(CompilerRTUtils)
diff --git a/compiler-rt/lib/crt/crtbegin.c b/compiler-rt/lib/crt/crtbegin.c
index ab273b145f58e..a0860ca12ea03 100644
--- a/compiler-rt/lib/crt/crtbegin.c
+++ b/compiler-rt/lib/crt/crtbegin.c
@@ -60,6 +60,10 @@ __asm__(".pushsection .init,\"ax\",%progbits\n\t"
__asm__(".pushsection .init,\"ax\",%progbits\n\t"
"bl __do_init\n\t"
".popsection");
+#elif defined(__mips__)
+__asm__(".pushsection .init,\"ax\", at progbits\n\t"
+ "jal __do_init\n\t"
+ ".popsection");
#elif defined(__powerpc__) || defined(__powerpc64__)
__asm__(".pushsection .init,\"ax\", at progbits\n\t"
"bl __do_init\n\t"
@@ -109,6 +113,10 @@ __asm__(".pushsection .fini,\"ax\", at progbits\n\t"
__asm__(".pushsection .fini,\"ax\",%progbits\n\t"
"bl __do_fini\n\t"
".popsection");
+#elif defined(__mips__)
+__asm__(".pushsection .fini,\"ax\", at progbits\n\t"
+ "jal __do_fini\n\t"
+ ".popsection");
#elif defined(__powerpc__) || defined(__powerpc64__)
__asm__(".pushsection .fini,\"ax\", at progbits\n\t"
"bl __do_fini\n\t"
More information about the llvm-commits
mailing list