[PATCH] D147547: [AMDGPU] Add buffer intrinsics that take resources as pointers

Krzysztof Drewniak via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 12 16:31:13 PDT 2023


krzysz00 added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsAMDGPU.td:1072-1073
+  AMDGPURsrcIntrinsic<0>;
+def int_amdgcn_raw_buffer_ptr_load_format : AMDGPURawBufferPtrLoad<llvm_anyfloat_ty>;
+def int_amdgcn_raw_buffer_ptr_load : AMDGPURawBufferPtrLoad;
+
----------------
arsenm wrote:
> I'd lean towards swapping the naming around, so that you would have "int_amdgcn_raw_ptr_buffer_load". That way the ISA opcode name part remains unbroken 
I don't see any reason why not, done.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll:3
 ; RUN: llc -global-isel -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck %s -check-prefix=GFX90A
+; RUN: llc < %s -march=amdgcn -mcpu=gfx940 -verify-machineinstrs | FileCheck %s -check-prefix=GFX940
 
----------------
piotr wrote:
> This should be testing gfx90a, not gfx940, right?
The corresponding non-gisel test has both gfx90a and gfx940 - I figured I should update this one to match while I'm here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147547/new/

https://reviews.llvm.org/D147547



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