[llvm] 3b221c6 - Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 12 02:59:31 PDT 2023


Author: Simon Pilgrim
Date: 2023-04-12T10:59:09+01:00
New Revision: 3b221c6bc3e364bfb4d958f88ee4ad7ec4d77912

URL: https://github.com/llvm/llvm-project/commit/3b221c6bc3e364bfb4d958f88ee4ad7ec4d77912
DIFF: https://github.com/llvm/llvm-project/commit/3b221c6bc3e364bfb4d958f88ee4ad7ec4d77912.diff

LOG: Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC

Added: 
    

Modified: 
    llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 901ec39d05a0..2baaa591c35c 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -3181,7 +3181,7 @@ bool LoongArchTargetLowering::decomposeMulByConstant(LLVMContext &Context,
         return false;
       // We do not consider the case `(-Imm - ImmSmall).isPowerOf2()`,
       // since it needs one more instruction than other 3 cases.
-      APInt ImmSmall = APInt(Imm.getBitWidth(), 1 << Shifts, true);
+      APInt ImmSmall = APInt(Imm.getBitWidth(), 1ULL << Shifts, true);
       if ((Imm - ImmSmall).isPowerOf2() || (Imm + ImmSmall).isPowerOf2() ||
           (ImmSmall - Imm).isPowerOf2())
         return true;


        


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