[PATCH] D147996: [X86] combineConcatVectorOps - remove FADD/FSUB/FMUL handling (2-1)

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added a comment.

In D147996#4257357 <https://reviews.llvm.org/D147996#4257357>, @RKSimon wrote:

> Have you got example code snippets that more clearly show the regression?

I notice the regression from our big performance test (coremark-pro), hard to simply it here.


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https://reviews.llvm.org/D147996