[PATCH] D147692: [LoongArch] Optimize multiplication with immediates
Lu Weining via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 11 19:48:25 PDT 2023
SixWeining added a comment.
The changes LGTM except a nit in comments. Thanks.
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Comment at: llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:3169
+ // Break (MUL x, imm) into (ADD/SUB (SLLI x, s0), (SLLI x, s1)),
+ // in which the immediate has two set bits.
+ // We should reject immediates which can be composed via a single
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Seems this condition only applies to `ADD` but no `SUB`. For example, in below test, `65280` is 0xff00 which has 8 consecutive set bits.
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https://reviews.llvm.org/D147692/new/
https://reviews.llvm.org/D147692
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