[PATCH] D147681: [RISCV] Support vector type strict_fmaxnum/fminnum.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I'm not sure if we can do this. LLVM's maxnum/minnum intrinsics follow the IEEE 754-2008 definition. According to the vector spec, RISC-V follows the IEEE 758-2019 definition

  Note that in version 2.2 of the F extension, the FMIN.S and FMAX.S instructions were amended to implement the proposed IEEE 754-201x minimumNumber and maximumNumber operations, rather than the IEEE 754-2008 minNum and maxNum operations. These operations differ in their handling of signaling NaNs.

Without STRICT we can ignore signalling nans so we can directly lower maxnum/minnum to vfmax/vfmin. We aren't able to do that with STRICT. That's why scalar STRICT_FMAXNUM/FMINNUM isn't implemented for RISC-V.


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