[llvm] 9041e1f - [DAG] Peek through zext/trunc in haveNoCommonBitsSet.

[Amaury Séchet via llvm-commits]

Author: Amaury Séchet
Date: 2023-04-11T11:44:15Z
New Revision: 9041e1fa29a47bd56da4e81edc379616abad16c1

URL: https://github.com/llvm/llvm-project/commit/9041e1fa29a47bd56da4e81edc379616abad16c1
DIFF: https://github.com/llvm/llvm-project/commit/9041e1fa29a47bd56da4e81edc379616abad16c1.diff

LOG: [DAG] Peek through zext/trunc in haveNoCommonBitsSet.

This limitation was discovered thanks to some regression in D127115 .

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D147821

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/test/CodeGen/X86/add-and-not.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index acb67b10b52b..c94c0f15bc9f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5054,6 +5054,10 @@ static bool haveNoCommonBitsSetCommutative(SDValue A, SDValue B) {
                                       SDValue Other) {
     if (SDValue NotOperand =
             getBitwiseNotOperand(Not, Mask, /* AllowUndefs */ true)) {
+      if (NotOperand->getOpcode() == ISD::ZERO_EXTEND ||
+          NotOperand->getOpcode() == ISD::TRUNCATE)
+        NotOperand = NotOperand->getOperand(0);
+
       if (Other == NotOperand)
         return true;
       if (Other->getOpcode() == ISD::AND)
@@ -5062,6 +5066,13 @@ static bool haveNoCommonBitsSetCommutative(SDValue A, SDValue B) {
     }
     return false;
   };
+
+  if (A->getOpcode() == ISD::ZERO_EXTEND || A->getOpcode() == ISD::TRUNCATE)
+    A = A->getOperand(0);
+
+  if (B->getOpcode() == ISD::ZERO_EXTEND || B->getOpcode() == ISD::TRUNCATE)
+    B = B->getOperand(0);
+
   if (A->getOpcode() == ISD::AND)
     return MatchNoCommonBitsPattern(A->getOperand(0), A->getOperand(1), B) ||
            MatchNoCommonBitsPattern(A->getOperand(1), A->getOperand(0), B);

diff  --git a/llvm/test/CodeGen/X86/add-and-not.ll b/llvm/test/CodeGen/X86/add-and-not.ll
index 18f8e6d62382..5025773b4327 100644
--- a/llvm/test/CodeGen/X86/add-and-not.ll
+++ b/llvm/test/CodeGen/X86/add-and-not.ll
@@ -311,13 +311,9 @@ define ptr @gep_and_xor_const(ptr %a) {
 define i64 @add_and_xor_const_ext_trunc(i64 %x) {
 ; X86-LABEL: add_and_xor_const_ext_trunc:
 ; X86:       # %bb.0:
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    movl %ecx, %eax
-; X86-NEXT:    notl %eax
-; X86-NEXT:    andl $1, %eax
-; X86-NEXT:    addl %ecx, %eax
-; X86-NEXT:    adcl $0, %edx
+; X86-NEXT:    orl $1, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_and_xor_const_ext_trunc:
@@ -325,7 +321,7 @@ define i64 @add_and_xor_const_ext_trunc(i64 %x) {
 ; X64-NEXT:    movl %edi, %eax
 ; X64-NEXT:    notl %eax
 ; X64-NEXT:    andl $1, %eax
-; X64-NEXT:    addq %rdi, %rax
+; X64-NEXT:    orq %rdi, %rax
 ; X64-NEXT:    retq
   %t = trunc i64 %x to i32
   %xor = xor i32 %t, -1