[PATCH] D147168: [AMDGPU] Introduce SIInstrWorklist to process instructions in moveToVALU

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/sub.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN1 %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN2 %s
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Please use more descriptive prefixes: GFX6, GFX8, GFX9.


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Comment at: llvm/test/CodeGen/AMDGPU/sub.ll:223-224
 
-; Make sure the VOP3 form of sub is initially selected. Otherwise pair
-; of opies from/to VCC would be necessary
-
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Should keep this explanatory comment (unless it is no longer relevant).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147168/new/

https://reviews.llvm.org/D147168