[PATCH] D147996: [X86] combineConcatVectorOps - remove FADD/FSUB/FMUL handling (2-1)

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added inline comments.


================
Comment at: llvm/test/CodeGen/X86/widen_fadd.ll:132
   ret void
 }
 
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Not sure why **mid-end** not vectorize them to

```
define void @widen_fadd_v2f32_v8f32(ptr %a0, ptr %b0, ptr %c0) {
  %va0 = load <8 x float>, ptr %a0, align 4
  %vb0 = load <8 x float>, ptr %b0, align 4
  %vc0 = fadd <8 x float> %va0, %vb0
  store <8 x float> %vc0, ptr %c0, align 4
  ret void
}
```
(even I add "fast" in fadd IRs)


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  https://reviews.llvm.org/D147996/new/

https://reviews.llvm.org/D147996