[llvm] 03dcd9d - [InstCombine] Allow splats with poison/undef in llvm::decomposeBitTestICmp

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 11 01:03:19 PDT 2023


Author: John McIver
Date: 2023-04-11T09:03:01+01:00
New Revision: 03dcd9da1ae567b2c37c8c3838b2f8ea1095d835

URL: https://github.com/llvm/llvm-project/commit/03dcd9da1ae567b2c37c8c3838b2f8ea1095d835
DIFF: https://github.com/llvm/llvm-project/commit/03dcd9da1ae567b2c37c8c3838b2f8ea1095d835.diff

LOG: [InstCombine] Allow splats with poison/undef in llvm::decomposeBitTestICmp

This change is made to enable conversion of a masked icmp splat vector
containing poison/undef to an equality expression.

llvm::decomposeBitTestICmp Alive2 correctness examples using splat/masking vectors:

    SLT <    https://alive2.llvm.org/ce/z/pPTTHh
    SLE <=   https://alive2.llvm.org/ce/z/qQhAmU
    SGT >    https://alive2.llvm.org/ce/z/koFHzF
    SGE >=   https://alive2.llvm.org/ce/z/3SNz2S
    ULT <u   https://alive2.llvm.org/ce/z/W8ktzQ
    ULE <=u  https://alive2.llvm.org/ce/z/G5SdUY
    UGT >u   https://alive2.llvm.org/ce/z/WFwYxq
    UGE >=u  https://alive2.llvm.org/ce/z/DzJszP

Tests have been verified using Alive2:

    icmp-logical.ll: @nomask_splat_and_B_allones       https://alive2.llvm.org/ce/z/zmJwQU
    icmp-logical.ll: @nomask_splat_and_B_mixed         https://alive2.llvm.org/ce/z/ktzgzd
    signed-truncation-check.ll: @positive_vec_undef0   https://alive2.llvm.org/ce/z/-sTRLD

Differential Revision: https://reviews.llvm.org/D143032

Added: 
    

Modified: 
    llvm/lib/Analysis/CmpInstAnalysis.cpp
    llvm/test/Transforms/InstCombine/icmp-logical.ll
    llvm/test/Transforms/InstCombine/signed-truncation-check.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/CmpInstAnalysis.cpp b/llvm/lib/Analysis/CmpInstAnalysis.cpp
index 20b1df6e1495..d6407e875073 100644
--- a/llvm/lib/Analysis/CmpInstAnalysis.cpp
+++ b/llvm/lib/Analysis/CmpInstAnalysis.cpp
@@ -79,7 +79,7 @@ bool llvm::decomposeBitTestICmp(Value *LHS, Value *RHS,
   using namespace PatternMatch;
 
   const APInt *C;
-  if (!match(RHS, m_APInt(C)))
+  if (!match(RHS, m_APIntAllowUndef(C)))
     return false;
 
   switch (Pred) {

diff  --git a/llvm/test/Transforms/InstCombine/icmp-logical.ll b/llvm/test/Transforms/InstCombine/icmp-logical.ll
index 98fa470427ff..ccd86f1a6739 100644
--- a/llvm/test/Transforms/InstCombine/icmp-logical.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-logical.ll
@@ -379,10 +379,7 @@ define i1 @fold_mask_cmps_to_true_logical(i32 %x) {
 
 define <2 x i1> @nomask_splat_and_B_allones(<2 x i32> %A) {
 ; CHECK-LABEL: @nomask_splat_and_B_allones(
-; CHECK-NEXT:    [[TST1:%.*]] = icmp slt <2 x i32> [[A:%.*]], <i32 0, i32 poison>
-; CHECK-NEXT:    [[MASK2:%.*]] = and <2 x i32> [[A]], <i32 1879048192, i32 1879048192>
-; CHECK-NEXT:    [[TST2:%.*]] = icmp eq <2 x i32> [[MASK2]], <i32 1879048192, i32 1879048192>
-; CHECK-NEXT:    [[RES:%.*]] = and <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT:    [[RES:%.*]] = icmp ugt <2 x i32> [[A:%.*]], <i32 -268435457, i32 -268435457>
 ; CHECK-NEXT:    ret <2 x i1> [[RES]]
 ;
   %tst1 = icmp slt <2 x i32> %A, <i32 0, i32 poison>
@@ -394,10 +391,8 @@ define <2 x i1> @nomask_splat_and_B_allones(<2 x i32> %A) {
 
 define <2 x i1> @nomask_splat_and_B_mixed(<2 x i32> %A) {
 ; CHECK-LABEL: @nomask_splat_and_B_mixed(
-; CHECK-NEXT:    [[TST1:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 -1, i32 poison>
-; CHECK-NEXT:    [[MASK2:%.*]] = and <2 x i32> [[A]], <i32 1879048192, i32 1879048192>
-; CHECK-NEXT:    [[TST2:%.*]] = icmp eq <2 x i32> [[MASK2]], <i32 1879048192, i32 1879048192>
-; CHECK-NEXT:    [[RES:%.*]] = and <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 -268435456, i32 -268435456>
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 1879048192, i32 1879048192>
 ; CHECK-NEXT:    ret <2 x i1> [[RES]]
 ;
   %tst1 = icmp sgt <2 x i32> %A, <i32 -1, i32 poison>

diff  --git a/llvm/test/Transforms/InstCombine/signed-truncation-check.ll b/llvm/test/Transforms/InstCombine/signed-truncation-check.ll
index 00af639a2d77..208e166b2c87 100644
--- a/llvm/test/Transforms/InstCombine/signed-truncation-check.ll
+++ b/llvm/test/Transforms/InstCombine/signed-truncation-check.ll
@@ -200,11 +200,8 @@ define <2 x i1> @positive_vec_nonsplat(<2 x i32> %arg) {
 
 define <3 x i1> @positive_vec_undef0(<3 x i32> %arg) {
 ; CHECK-LABEL: @positive_vec_undef0(
-; CHECK-NEXT:    [[T1:%.*]] = icmp sgt <3 x i32> [[ARG:%.*]], <i32 -1, i32 undef, i32 -1>
-; CHECK-NEXT:    [[T2:%.*]] = add <3 x i32> [[ARG]], <i32 128, i32 128, i32 128>
-; CHECK-NEXT:    [[T3:%.*]] = icmp ult <3 x i32> [[T2]], <i32 256, i32 256, i32 256>
-; CHECK-NEXT:    [[T4:%.*]] = and <3 x i1> [[T1]], [[T3]]
-; CHECK-NEXT:    ret <3 x i1> [[T4]]
+; CHECK-NEXT:    [[T4_SIMPLIFIED:%.*]] = icmp ult <3 x i32> [[ARG:%.*]], <i32 128, i32 128, i32 128>
+; CHECK-NEXT:    ret <3 x i1> [[T4_SIMPLIFIED]]
 ;
   %t1 = icmp sgt <3 x i32> %arg, <i32 -1, i32 undef, i32 -1>
   %t2 = add <3 x i32> %arg, <i32 128, i32 128, i32 128>


        


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