[llvm] 87c1ed5 - Change dyn_cast to cast

[Bing1 Yu via llvm-commits]

Author: Bing1 Yu
Date: 2023-04-11T00:14:39+08:00
New Revision: 87c1ed5385968cea011c6a8e0ef5be435fda102b

URL: https://github.com/llvm/llvm-project/commit/87c1ed5385968cea011c6a8e0ef5be435fda102b
DIFF: https://github.com/llvm/llvm-project/commit/87c1ed5385968cea011c6a8e0ef5be435fda102b.diff

LOG: Change dyn_cast to cast

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D147923

Added: 
    

Modified: 
    llvm/lib/CodeGen/WinEHPrepare.cpp
    llvm/utils/TableGen/AsmWriterEmitter.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/WinEHPrepare.cpp b/llvm/lib/CodeGen/WinEHPrepare.cpp
index d6d4af088ff1e..9050f6be48762 100644
--- a/llvm/lib/CodeGen/WinEHPrepare.cpp
+++ b/llvm/lib/CodeGen/WinEHPrepare.cpp
@@ -250,7 +250,7 @@ void llvm::calculateCXXStateForAsynchEH(const BasicBlock *BB, int State,
       // Retrive the new State
       State = EHInfo.CxxUnwindMap[State].ToState; // Retrive next State
     } else if (isa<InvokeInst>(TI)) {
-      auto *Call = dyn_cast<CallBase>(TI);
+      auto *Call = cast<CallBase>(TI);
       const Function *Fn = Call->getCalledFunction();
       if (Fn && Fn->isIntrinsic() &&
           (Fn->getIntrinsicID() == Intrinsic::seh_scope_begin ||
@@ -318,7 +318,7 @@ void llvm::calculateSEHStateForAsynchEH(const BasicBlock *BB, int State,
       // Retrive the new State.
       State = EHInfo.SEHUnwindMap[State].ToState; // Retrive next State
     } else if (isa<InvokeInst>(TI)) {
-      auto *Call = dyn_cast<CallBase>(TI);
+      auto *Call = cast<CallBase>(TI);
       const Function *Fn = Call->getCalledFunction();
       if (Fn && Fn->isIntrinsic() &&
           Fn->getIntrinsicID() == Intrinsic::seh_try_begin)

diff  --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 505fdd8c25fb9..92e71910a8004 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -1006,7 +1006,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
         bool IsOr = CombineType == "any_of";
         // Change (any_of FeatureAll, (any_of ...)) to (any_of FeatureAll, ...).
         if (IsOr && D->getNumArgs() == 2 && isa<DagInit>(D->getArg(1))) {
-          DagInit *RHS = dyn_cast<DagInit>(D->getArg(1));
+          DagInit *RHS = cast<DagInit>(D->getArg(1));
           SmallVector<Init *> Args{D->getArg(0)};
           SmallVector<StringInit *> ArgNames{D->getArgName(0)};
           for (unsigned i = 0, e = RHS->getNumArgs(); i != e; ++i) {