[PATCH] D147872: [X86] Correct the scheduling information for AVX-VNNI and AVX512-VNNI instructons.

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86InstrAVX512.td:12589
                                    EVEX_4V, EVEX_CD8<32, CD8VF>, EVEX_B,
-                                   T8PD, Sched<[sched.Folded, sched.ReadAfterFold]>;
+                                   T8PD, Sched<[sched.Folded, sched.ReadAfterFold,
+                                                sched.ReadAfterFold]>;
----------------
LuoYuanke wrote:
> LuoYuanke wrote:
> > craig.topper wrote:
> > > LuoYuanke wrote:
> > > > @craig.topper, I don't understand why it needs another sched.ReadAfterFold? Is it because there are 3 operands?
> > > Yes each read is associated with an operand. So we need one for each vector source.
> > Why in line 12580, for rr version, there is only one sched (WriteVecIMulX) in the sched list?
> I mean
> 
> ```
>   defm r  :   AVX512_maskable_3src<Op, MRMSrcReg, VTI, (outs VTI.RC:$dst),
>                                    (ins VTI.RC:$src2, VTI.RC:$src3), OpStr,
>                                    "$src3, $src2", "$src2, $src3",
>                                    (VTI.VT (OpNode VTI.RC:$src1,
>                                             VTI.RC:$src2, VTI.RC:$src3)),
>                                    IsCommutable, IsCommutable>,
>                                    EVEX_4V, T8PD, Sched<[sched]>;
> ```
My understand is it's intended for memory variant https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/X86Schedule.td#L41-L51


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