[PATCH] D147934: [RISCV] Support LLVM IR intrinsics for XSfvcp extension.

[Brandon Wu via Phabricator via llvm-commits]

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This patch aims at supporting LLVM IR for sifive VCIX(XSfvcp).

Note that sf.vc.x and sf.vc.i intrinsics don't have any vector types in the output
and inputs, but the intrinsic spec said that we still need to add vetvli for
them. Therefore, we need to encode the VTYPE to these IR names.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147934

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
  llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
  llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
  llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
  llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll

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