[PATCH] D146915: Implement TypeSig generator in `Intrinsics.td`

[NAKAMURA Takumi via Phabricator via llvm-commits]

chapuni marked 3 inline comments as done.
chapuni added inline comments.


================
Comment at: llvm/include/llvm/IR/Intrinsics.td:185
 
+// (Idx << 3) | ArgCode
+class EncAnyType<int ArgCode=0> {
----------------
arsenm wrote:
> I don't know what Idx means here in relation to the constant 0x100
I have rewritten more descriptive.


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Comment at: llvm/include/llvm/IR/Intrinsics.td:215
+  int ax
+> {
+  int ah = !and(ax, 0xFF00);
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arsenm wrote:
> Should be on previous line
I have reindented typelist deeper since I was afraid it would cause less readable.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146915/new/

https://reviews.llvm.org/D146915