[PATCH] D146950: [Xtensa] Implement load pseudo operations and patterns.

Maciej Czekaj via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 7 03:31:29 PDT 2023


maciejcz added a comment.
Herald added a subscriber: sstefan1.

The code conforms to ISA. One "optimization" remark: pseudo-instruction might be replaced by tablegen pattern in this case.



================
Comment at: llvm/lib/Target/Xtensa/XtensaISelLowering.cpp:1141
 
+  case Xtensa::L8I_P: {
+    MachineOperand &R = MI.getOperand(0);
----------------
This snippet can be represented as Tablegen pattern below. 
If that is true, we don't have to use pseudo instruction in this case.
```
def : Pat<(i32 (sextloadi8  addr_ish1:$addr)), 
          (SRAI 
            (SLLI 
              (L8UI addr_ish1:$addr), 
              (i32 24)),
            (i32 24))>;
```


Repository:
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