[llvm] d9e884f - [LoongArch][NFC] Add tests of multiplication with immediates (for D147428)
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 6 17:47:03 PDT 2023
Author: Ben Shi
Date: 2023-04-07T08:46:49+08:00
New Revision: d9e884fe749f9252645156573722772321a8bcd7
URL: https://github.com/llvm/llvm-project/commit/d9e884fe749f9252645156573722772321a8bcd7
DIFF: https://github.com/llvm/llvm-project/commit/d9e884fe749f9252645156573722772321a8bcd7.diff
LOG: [LoongArch][NFC] Add tests of multiplication with immediates (for D147428)
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D147427
Added:
Modified:
llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
index 0dc37eebe8535..c4a4bc310ddd7 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
@@ -1163,3 +1163,151 @@ define i64 @mul_i64_4112(i64 %a) {
%b = mul i64 %a, 4112
ret i64 %b
}
+
+define signext i32 @mul_i32_768(i32 %a) {
+; LA32-LABEL: mul_i32_768:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 768
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_768:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 768
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 768
+ ret i32 %b
+}
+
+define signext i32 @mul_i32_1280(i32 %a) {
+; LA32-LABEL: mul_i32_1280:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 1280
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_1280:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 1280
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 1280
+ ret i32 %b
+}
+
+define signext i32 @mul_i32_2304(i32 %a) {
+; LA32-LABEL: mul_i32_2304:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 2304
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_2304:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 2304
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 2304
+ ret i32 %b
+}
+
+define signext i32 @mul_i32_4352(i32 %a) {
+; LA32-LABEL: mul_i32_4352:
+; LA32: # %bb.0:
+; LA32-NEXT: lu12i.w $a1, 1
+; LA32-NEXT: ori $a1, $a1, 256
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_4352:
+; LA64: # %bb.0:
+; LA64-NEXT: lu12i.w $a1, 1
+; LA64-NEXT: ori $a1, $a1, 256
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 4352
+ ret i32 %b
+}
+
+define i64 @mul_i64_768(i64 %a) {
+; LA32-LABEL: mul_i64_768:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 768
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_768:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 768
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 768
+ ret i64 %b
+}
+
+define i64 @mul_i64_1280(i64 %a) {
+; LA32-LABEL: mul_i64_1280:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 1280
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_1280:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 1280
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 1280
+ ret i64 %b
+}
+
+define i64 @mul_i64_2304(i64 %a) {
+; LA32-LABEL: mul_i64_2304:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 2304
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_2304:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 2304
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 2304
+ ret i64 %b
+}
+
+define i64 @mul_i64_4352(i64 %a) {
+; LA32-LABEL: mul_i64_4352:
+; LA32: # %bb.0:
+; LA32-NEXT: lu12i.w $a2, 1
+; LA32-NEXT: ori $a2, $a2, 256
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_4352:
+; LA64: # %bb.0:
+; LA64-NEXT: lu12i.w $a1, 1
+; LA64-NEXT: ori $a1, $a1, 256
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 4352
+ ret i64 %b
+}
More information about the llvm-commits
mailing list