[PATCH] D147451: [CodeGen] Enable AArch64 SVE FCMLA/FCADD instruction generation in ComplexDeinterleaving

[mgabka via Phabricator via llvm-commits]

mgabka added inline comments.


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Comment at: llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp:23
+// deinterleaving can be represented by vector.interleave2 and
+// vectore.deinterleave2 intrinsics. Scalable vectors can be represented only by
+// these intrinsics, whereas, fixed-width vectors are recognized for both
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nit: typo


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Comment at: llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp:25
+// these intrinsics, whereas, fixed-width vectors are recognized for both
+// Shuffle operations and intrinsics.
 //
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nit: probably does not need to start with capital letter, maybe using "shufflevector instruction" would be more clear


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:24460
+bool AArch64TargetLowering::isComplexDeinterleavingSupported(
+    bool UseScalable) const {
+  if (UseScalable)
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I think it could be worth to add extra run lines to the existing aarch64 tests which operate on fixed width vectors, to make sure that adding +sve does not stop generation of fcmla there. What do you think?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147451/new/

https://reviews.llvm.org/D147451