[PATCH] D145301: Add more efficient vector bitcast for AArch64

[Lawrence Benson via Phabricator via llvm-commits]

lawben added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19484
+  unsigned Opcode = Op.getOpcode();
+  if (Opcode == ISD::OR || Opcode == ISD::AND)
+    return isChainOfComparesAndLogicalOps(Op.getOperand(0), BaseVT,
----------------
Sp00ph wrote:
> There's probably quite a few more operations that preserve the mask property (xor, min and max come to mind).
Adding `XOR` is reasonable. I'd not add `MIN/MAX`, as they are not logical operators. So while they technically apply and preserve the all-1/0 property, I feel like they don't "belong" here. 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145301/new/

https://reviews.llvm.org/D145301