[llvm] 06d5b12 - [X86][mem-fold] Remove redundant variable IsAligned, NFCI

[Shengchen Kan via llvm-commits]

Author: Shengchen Kan
Date: 2023-04-06T17:18:03+08:00
New Revision: 06d5b129930b745629d75437622956a0deba4a21

URL: https://github.com/llvm/llvm-project/commit/06d5b129930b745629d75437622956a0deba4a21
DIFF: https://github.com/llvm/llvm-project/commit/06d5b129930b745629d75437622956a0deba4a21.diff

LOG: [X86][mem-fold] Remove redundant variable IsAligned, NFCI

Added: 
    

Modified: 
    llvm/utils/TableGen/X86FoldTablesEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index 9b1d5fee6719..09267321f8c9 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -76,7 +76,6 @@ class X86FoldTablesEmitter {
     bool CannotFold = false;
     bool IsLoad = false;
     bool IsStore = false;
-    bool IsAligned = false;
     Align Alignment;
 
     X86FoldTableEntry() = default;
@@ -98,7 +97,7 @@ class X86FoldTablesEmitter {
         Attrs += "TB_NO_REVERSE|";
       if (CannotFold)
         Attrs += "TB_NO_FORWARD|";
-      if (IsAligned)
+      if (Alignment != Align(1))
         Attrs += "TB_ALIGN_" + std::to_string(Alignment.value()) + "|";
 
       StringRef SimplifiedAttrs = StringRef(Attrs).rtrim("|");
@@ -388,7 +387,6 @@ void X86FoldTablesEmitter::addEntryWithFlags(FoldTable &Table,
     Result.CannotFold = (S & TB_NO_FORWARD) != 0;
     Result.IsLoad = (S & TB_FOLDED_LOAD) != 0;
     Result.IsStore = (S & TB_FOLDED_STORE) != 0;
-    Result.IsAligned = (S & TB_ALIGN_MASK) != 0;
     Result.Alignment = Align(1ULL << ((S & TB_ALIGN_MASK) >> TB_ALIGN_SHIFT));
     Table[RegInstr] = Result;
     return;
@@ -441,13 +439,11 @@ void X86FoldTablesEmitter::addEntryWithFlags(FoldTable &Table,
   if (isExplicitAlign(RegInstr)) {
     // The instruction require explicitly aligned memory.
     BitsInit *VectSize = RegRec->getValueAsBitsInit("VectSize");
-    Result.IsAligned = true;
     Result.Alignment = Align(byteFromBitsInit(VectSize));
   } else if (!Enc && !isExplicitUnalign(RegInstr) &&
              getMemOperandSize(MemOpRec) > 64) {
     // Instructions with XOP/VEX/EVEX encoding do not require alignment while
     // SSE packed vector instructions require a 16 byte alignment.
-    Result.IsAligned = true;
     Result.Alignment = Align(16);
   }
   // Expand is only ever created as a masked instruction. It is not safe to