[PATCH] D146632: [PowerPC] Fix the xxperm swap requirements

Wed Apr 5 18:41:44 PDT 2023

maryammo added a comment.

The patch is causing bot failures which did not show up at the time of posting this: 
https://lab.llvm.org/buildbot/#/builders/16/builds/46086/steps/6/logs/FAIL__LLVM__pr61315_ll
TEST 'LLVM :: CodeGen/PowerPC/pr61315.ll' FAILED 
I will post another patch to update that test accordingly.

================
Comment at: llvm/test/CodeGen/PowerPC/pre-inc-disable.ll:140
 ; P9LE-NEXT:    add 5, 3, 4
-; P9LE-NEXT:    lfiwzx 0, 3, 4
+; P9LE-NEXT:    lxsiwzx 2, 3, 4
 ; P9LE-NEXT:    addis 3, 2, .LCPI1_0 at toc@ha
----------------
stefanp wrote:
> Here we are replacing `lfiwzx` with `lxsiwzx`. 
> This could technically be a (very minor...) performance hit as we are now using an operation that is 5 cycles instead of 4. 
> I guess the upside is that we have a wider range of result registers.
Thanks, I am just not sure about the solution if there is any? 

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146632/new/

https://reviews.llvm.org/D146632