[PATCH] D146735: [CodeGen] Don't include aliases in RegisterClassInfo::IgnoreCSRForAllocOrder

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterClassInfo.cpp:97
   for (const MCPhysReg *I = CSR; *I; ++I)
-    for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
-      CSRHintsForAllocOrder[*AI] = STI.ignoreCSRForAllocationOrder(mf, *AI);
+    CSRHintsForAllocOrder[*I] = STI.ignoreCSRForAllocationOrder(mf, *I);
   if (IgnoreCSRForAllocOrder.size() != CSRHintsForAllocOrder.size() ||
----------------
foad wrote:
> foad wrote:
> > Srividya-Karumuri wrote:
> > > qcolombet wrote:
> > > > foad wrote:
> > > > > qcolombet wrote:
> > > > > > Given the only spot where `::ignoreCSRForAllocationOrder` is used is guarded by CalleeSavedAliases and that one is populated with regunits (after your other change), I think we should go through the regunits too here.
> > > > > How about this brute force approach, calling ignoreCSRForAllocationOrder on every physical register? This is the simplest fastest thing I could come up with for AMDGPU, where ignoreCSRForAllocationOrder is just a virtual call to default implementation that returns false.
> > > > Isn't it cheaper (compile-time wise) to go through only the relevant regunits?
> > > Regarding the below comment, what is the "other change" that is being referred here?
> > > 
> > > <Given the only spot where ::ignoreCSRForAllocationOrder is used is guarded by CalleeSavedAliases and that one is populated with regunits (after your other change), I think we should go through the regunits too here.>
> > How? I can't call STI.ignoreCSRForAllocationOrder on a regunit, only on a register, so I would somehow have to find all registers that contain any regunit that is contained by any CSR - is that what you're suggesting? I don't think I can do that more cheaply than just iterating through all registers once each.
> D146734
I was thinking that we would go through the roots of the regunits, but you're right technically that may not be enough.
Brute force here sounds fine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146735/new/

https://reviews.llvm.org/D146735