[PATCH] D147433: [AArch64][SME] Disable ZA LDR/STR addressing optimisations

[Caroline via Phabricator via llvm-commits]

CarolineConcatto added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sme-intrinsics-stores.ll:267
   %base = getelementptr i8, ptr %ptr, i64 15
-  call void @llvm.aarch64.sme.str(i32 0, ptr %base)
   ret void;
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I am still able to compiler these tests, without any change in this one. The only change is in the //str_with_off_15mulvl//, because it does not use the //mul vl.//
Is this correct?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147433/new/

https://reviews.llvm.org/D147433