[PATCH] D147602: [AArch64][GISel] Legalize non-power-of-two G_CTTZ

[Sam Elliott via Phabricator via llvm-commits]

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The main change here is to add a `widenScalarToNextPow2` before the
`clampScalar` so that non-power-of-two sizes between 32 and 64 are
turned into s64 count trailing zeroes.

However, if you make the legalisation rules depend on TypeIdx 0 (the
output), then you still get crashes for the s65 testcase, which I solved
by instead flipping the rules around to be about TypeIdx 1 (the input),
with a `scalarSameSizeAs` at the end to tie index 0 to index 1. This,
incidentally, is how things are written for `G_CTLZ`.

Depends on D147518 <https://reviews.llvm.org/D147518>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147602

Files:
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir

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