[PATCH] D147517: [NFC][AArch64] Add Test for PR61549
Sam Elliott via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 5 04:39:48 PDT 2023
lenary edited the summary of this revision.
lenary updated this revision to Diff 511049.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D147517/new/
https://reviews.llvm.org/D147517
Files:
llvm/test/CodeGen/AArch64/pr61549.ll
Index: llvm/test/CodeGen/AArch64/pr61549.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/pr61549.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64 --global-isel | FileCheck %s --check-prefix=GISEL
+
+define i35 @f(i35 %0) {
+; CHECK-LABEL: f:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #1 // =0x1
+; CHECK-NEXT: sbfx x9, x0, #0, #35
+; CHECK-NEXT: sdiv x10, x8, x9
+; CHECK-NEXT: msub x8, x10, x9, x8
+; CHECK-NEXT: eor x0, x8, #0x1
+; CHECK-NEXT: ret
+;
+; GISEL-LABEL: f:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1 // =0x1
+; GISEL-NEXT: sbfx x9, x0, #0, #35
+; GISEL-NEXT: sdiv x10, x8, x9
+; GISEL-NEXT: msub x8, x10, x9, x8
+; GISEL-NEXT: and x8, x8, #0x7ffffffff
+; GISEL-NEXT: clz x8, x8
+; GISEL-NEXT: sub x8, x8, #29
+; GISEL-NEXT: ubfx x0, x8, #5, #30
+; GISEL-NEXT: ret
+ %2 = srem i35 1, %0
+ %3 = call i35 @llvm.ctlz.i35(i35 %2, i1 false)
+ %4 = lshr i35 %3, 5
+ ret i35 %4
+}
+
+declare i35 @llvm.ctlz.i35(i35, i1 immarg)
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