[llvm] fe963a8 - [NFC][InstCombine] Add tests that show bogus combine of SVE intrinsics when using strictfp.

[Paul Walker via llvm-commits]

Author: Paul Walker
Date: 2023-04-05T10:55:11Z
New Revision: fe963a861851fb5b1463f8d4ab20a1b6138d3efd

URL: https://github.com/llvm/llvm-project/commit/fe963a861851fb5b1463f8d4ab20a1b6138d3efd
DIFF: https://github.com/llvm/llvm-project/commit/fe963a861851fb5b1463f8d4ab20a1b6138d3efd.diff

LOG: [NFC][InstCombine] Add tests that show bogus combine of SVE intrinsics when using strictfp.

Added: 
    llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll
new file mode 100644
index 0000000000000..0272ffb3e2d54
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-strictfp.ll
@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --check-globals
+; RUN: opt -S -passes=inline,instcombine < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+; TODO: We can only lower to constrained intrinsics when the necessary code
+; generation support for scalable vector strict operations exists.
+define <vscale x 2 x double> @replace_fadd_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @replace_fadd_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[TMP1:%.*]] = fadd <vscale x 2 x double> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
+;
+  %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) #1
+  %2 = tail call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %1, <vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %2
+}
+
+; NOTE: IRBuilder::CreateBinOp doesn't emit constrained operations directly so
+; rely on function inlining to showcase the problematic transformation.
+define <vscale x 2 x double> @call_replace_fadd_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @call_replace_fadd_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[DOTSTRICT:%.*]] = call <vscale x 2 x double> @llvm.experimental.constrained.fadd.nxv2f64(<vscale x 2 x double> [[A:%.*]], <vscale x 2 x double> [[B:%.*]], metadata !"round.tonearest", metadata !"fpexcept.ignore") #[[ATTR3:[0-9]+]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[DOTSTRICT]]
+;
+  %1 = call <vscale x 2 x double> @replace_fadd_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %1
+}
+
+; TODO: We can only lower to constrained intrinsics when the necessary code
+; generation support for scalable vector strict operations exists.
+define <vscale x 2 x double> @replace_fmul_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @replace_fmul_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[TMP1:%.*]] = fmul <vscale x 2 x double> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
+;
+  %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) #1
+  %2 = tail call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %1, <vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %2
+}
+
+; NOTE: IRBuilder::CreateBinOp doesn't emit constrained operations directly so
+; rely on function inlining to showcase the problematic transformation.
+define <vscale x 2 x double> @call_replace_fmul_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @call_replace_fmul_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[DOTSTRICT:%.*]] = call <vscale x 2 x double> @llvm.experimental.constrained.fmul.nxv2f64(<vscale x 2 x double> [[A:%.*]], <vscale x 2 x double> [[B:%.*]], metadata !"round.tonearest", metadata !"fpexcept.ignore") #[[ATTR3]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[DOTSTRICT]]
+;
+  %1 = call <vscale x 2 x double> @replace_fmul_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %1
+}
+
+; TODO: We can only lower to constrained intrinsics when the necessary code
+; generation support for scalable vector strict operations exists.
+define <vscale x 2 x double> @replace_fsub_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @replace_fsub_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[TMP1:%.*]] = fsub <vscale x 2 x double> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
+;
+  %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) #1
+  %2 = tail call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %1, <vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %2
+}
+
+; NOTE: IRBuilder::CreateBinOp doesn't emit constrained operations directly so
+; rely on function inlining to showcase the problematic transformation.
+define <vscale x 2 x double> @call_replace_fsub_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
+; CHECK: Function Attrs: strictfp
+; CHECK-LABEL: @call_replace_fsub_intrinsic_double_strictfp(
+; CHECK-NEXT:    [[DOTSTRICT:%.*]] = call <vscale x 2 x double> @llvm.experimental.constrained.fsub.nxv2f64(<vscale x 2 x double> [[A:%.*]], <vscale x 2 x double> [[B:%.*]], metadata !"round.tonearest", metadata !"fpexcept.ignore") #[[ATTR3]]
+; CHECK-NEXT:    ret <vscale x 2 x double> [[DOTSTRICT]]
+;
+  %1 = call <vscale x 2 x double> @replace_fsub_intrinsic_double_strictfp(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #1
+  ret <vscale x 2 x double> %1
+}
+
+declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32)
+
+attributes #0 = { "target-features"="+sve" strictfp }
+attributes #1 = { strictfp }
+;.
+; CHECK: attributes #[[ATTR0:[0-9]+]] = { strictfp "target-features"="+sve" }
+; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) }
+; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
+; CHECK: attributes #[[ATTR3]] = { strictfp }
+;.