[PATCH] D146735: [CodeGen] Don't include aliases in RegisterClassInfo::IgnoreCSRForAllocOrder
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 4 06:37:31 PDT 2023
qcolombet added inline comments.
================
Comment at: llvm/lib/CodeGen/RegisterClassInfo.cpp:97
for (const MCPhysReg *I = CSR; *I; ++I)
- for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
- CSRHintsForAllocOrder[*AI] = STI.ignoreCSRForAllocationOrder(mf, *AI);
+ CSRHintsForAllocOrder[*I] = STI.ignoreCSRForAllocationOrder(mf, *I);
if (IgnoreCSRForAllocOrder.size() != CSRHintsForAllocOrder.size() ||
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Given the only spot where `::ignoreCSRForAllocationOrder` is used is guarded by CalleeSavedAliases and that one is populated with regunits (after your other change), I think we should go through the regunits too here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146735/new/
https://reviews.llvm.org/D146735
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