[PATCH] D147236: [AArch64][Combine]: combine <2xi64> Mul-Add.

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:17840
+
+  if(!N->getOperand(0).hasOneUse())
+    return SDValue();
----------------
I think the extract_subvector could also be operand 1, right? So I think you'll need to use the `if .. else if ..` logic above to decide what the operand is.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147236/new/

https://reviews.llvm.org/D147236